The post JDBC appeared first on Learning Space.

The post test-2 appeared first on Learning Space.

The post test post appeared first on Learning Space.

We will have the following components in our database application:

• Student.java – A JSF managed bean class.
• DatabaseOperation.java – This class is used to perform the Db related operations using hibernate framework.
• HibernateUtil.java – This class helps in creating the SessionFactory object from the hibernate configuration file.
• Student.hbm.xml – A mapping file for the persistent or the POJO class.
• hibernate.cfg.xml – Hibernate configuration file containing database related information.
• hibernate.reveng.xml – A mapping file to specify the type of mappings and table filtering.

1.1 Hibernate

The post JAVA: JSF Hibernate Implementation appeared first on Learning Space.

The post News and articles appeared first on Learning Space.

Loading…

Taking too long?

Reload document

| Open in new tab

The post 8086 Microprocessor appeared first on Learning Space.

It is classified into five functional categories:

• Data Transfer Instructions
• Arithmetic Instructions
• Logical Instructions
• Branching Instructions
• Machine-Control Instructions

1. Data Transfer Instructions

• These instructions move data between registers, or between memory and registers.
• These instructions copy data from source to destination (without changing the original data).

MOV [Copy from source to destination]

• The instruction copies the contents of the source register into the destination register.
• The contents of the source register are not altered.
• If one of the operands is a memory location, its location is specified by the content of the HL registers.

MVI [Move Immediate 8-bit]

• The 8-bit data is stored in the destination register or memory
• If the operand is a memory location, its location is specified by the contents of the HL registers
• Example: MVI B, 40_H  or MVI M, 40_H

LXI [Load Register Pair Immediate]

• The 16-bit data in the operand is loaded in the register pair immediately.
• Example: LXI H, D020_H

LDA [Load Accumulator Direct]

• The content of a memory location, specified by a 16-bit address in the operand, is copied to the accumulator.
• The contents of the source are not altered.
• Example: LDA 8000_H

LDAX [Load Accumulator Indirect]

• The content of a memory location, pointed by a register pair in the operand, is copied to the accumulator.
• The contents of the register pair or the memory location are not altered.
• Example: LDAX D

STA [Store Accumulator Direct]

• The content of the accumulator is copied into the memory location specified by the 16-bit address in the operand.
• The content of the source is not altered.
• Example: STA 8000_H

STAX [Store Accumulator Indirect]

• The content of the accumulator is copied into the memory location, pointed by a register pair in the operand.
• The contents of the register pair or the memory location are not altered.
• Example: STAX D

LHLD [Load H-L Pair Direct]

• The content of the memory location specified by the 16-bit address in the operand is copied into register L and the content of the next memory location into register H.
• Example: LHLD 8000_H

SHLD [Store H-L Pair Direct]

• The content of the register L is copied into the memory location specified by the 16-bit address in the operand and the content of the register H is copied to the next memory location.
• Example: SHLD 8000_H

XCHG [Exchange the contents]

• The content of the register H is exchanged with the content of register D, and the contents of register L are exchanged with the contents of register E.
• Example: XCHG

The post 8085 Instruction Sets appeared first on Learning Space.

Types of Addressing Modes

• Direct Addressing
• Immediate Addressing
• Register Addressing
• Indirect Addressing
• Implied Addressing.

Direct Addressing Mode

In this mode, the data to be operated is available in the memory location and the address of that data is in the instruction itself.

Example: Data is directly copied from the given address to the register.

• IN 00 H
• LDA 8000 H
• STA 9020 H

Register Addressing Mode

In this mode, the data to be operated is available inside the register(s). The register(s) are operands.

Example: Data is directly copied from one register to another register.

• MOV B, A
• ADD C
• SUB B
• PCHL

Register Indirect Addressing Mode

In this mode, the address of the operand located in the memory is specified by a register pair.

Example: Data is transferred between a register and a memory location address

• MOV B, M
• LDAX B
• SUB M

Immediate Addressing

In this mode, the operand is specified within the instruction itself. Immediate data is transferred directly to the register.

Example

MVI A, 05 H
LXI H, 8050 H
ADI 44 H

Implicit Addressing

If the address of the source of data as well as the address of the destination of the result is fixed, then there is no need to give any operand along with the instruction. In this mode, the data is specified by the opcode itself.

Example: RAR, CMA, DAA, STC, RAL, …

The post 8085 Microprocessor- Addressing Mode of 8085 MP appeared first on Learning Space.

An instruction is a binary pattern designed inside an MP to perform a specific function.

Each instruction has two parts:

• The task to be performed called the operation code (opcode).
• Data to be operated on, called the operand.

Instruction Formats Types

The instruction format is divided into three types:

• One Byte Instruction
• Two Byte Instruction
• Three Byte Instruction

One Byte Instruction

• Includes the opcode and operand in the same byte
• Operand(s) are internal register and are coded into the instruction.
• Requires one memory location.

Example of One Byte Instruction

Two Byte Instruction

• The first byte specifies the opcode and the second byte specifies the operand.
• The source operand is a data byte immediately following the opcode.
• The instruction would require two memory locations to store in memory.

Example of Two Byte Instruction

Three Byte Instruction

• The first byte specifies the opcode, and the following two bytes specify the 16-bit address.
• The instruction would require three memory locations to store in memory.
• NOTE: The second byte is the low-order address & the third byte is the higher-order address.
• Opcode + Data Byte (LO) + Data Byte (HO)

Example of Three Byte Instruction

The post 8085 Microprocessor – Assembly Language Programming (Part II) appeared first on Learning Space.

Internal Architecture of 8085

The internal architecture of 8-bit microprocessor 8085 is divided into the following groups

• Arithmetic & Logical Group
• Register Group
• Interrupt Control Group
• Serial I/O Group
• Instruction Register, Decoder, Timing, and Control Group

Arithmetic & Logical Group

Perform arithmetic & logical operations

Consists of

• Accumulator
• Temporary Registers
• Status and Flag Register, and
• ALU

Register Group

Store data and address in this register group

Consists of 3 types of registers

• Temporary Registers
• General Purpose Registers
• Special Purpose Registers

Special Purpose Registers

• Program Counter (PC)
• Stack Pointer (SP)
• Increment/Decrement Register

Interrupt Control

Accepts different interrupt request inputs such as

• TRAP
• RST 7.5
• RST 6.5
• RST 5.5
• INTR

When a valid interrupt request is present, it informs control logic to take action in response to each signal.

The post 8085 Microprocessor (Part I) appeared first on Learning Space.